Development and testing of a Hardware-in-the-Loop simulation infrastructure

Hardware-in-the-Loop (HiL) simulation combines the real Embedded Control System with a Digital Twin which simulates a plant in real-time. This facilitates thorough testing of the realised controller during the Embedded Control System development process.

The main goal of this thesis is to develop an infrastructure that enables users to apply HiL simulation for their own applications. The infrastructure has been tested with a HiL setup where the controller and plant model run on separate Raspberry Pis, communicating through FPGA-based signal processing.

The results show that the proposed infrastructure works and that a Raspberry Pi with Icoboard FPGA is a suitable hardware platform for a Digital Twin.