Home about us students frank hooglander Frank Hooglander E-mail f.j.p.hooglander@student.utwente.nl Assignments Development and testing of a Hardware-in-the-Loop simulation infrastructure (MSc assignment) Emulation of quadrature and H-bridge signals on an FPGA to enable HiL simulation (Individual assignment) Presentations Development and testing of a Hardware-in-the-Loop simulation infrastructure MSc presentation, Fri, 21/03/2025 - 14:00 , Carré 3446 Emulation of quadrature and H-bridge signals on an FPGA to enable HiL simulation Student presentation, Mon, 11/12/2023 - 14:00 , Carré 3446
